Analog computers



Sept. 17, 1963 J. w. ERICSON 3,104,319

ANALOG COMPUTERS Filed May 15, 1959 2 Sheets-Sheet 1 2 Sheets-Sheet 2 J. W. ERICSON ANALOG COMPUTERS fren W H Q.

M & aUIX L n imam Sept. 17, 1963 Filed May 15, 1959 722 81 ma E9986 United States Patent 3,194,319 ANALG-G CQMPUTERS John W. Ericson, Verona, Pa, assignor to Westinghouse Air Brake Qompany, Wiimerding, Pa, a corporation of Pennsylvania Filed May 15, 1959, Ser. No. 813,498 4 Ciainis. (til. 235-193) My invention relates to analog computers, and in particular to an improved analog computer for continuously generating a desired function of two variables.

Known analog computers have in general been based either on moving parts, such as potentiometers driven by servomechanisms, or on circuits incorporating nonlinear elements in which the current or voltage characteristics of the elements approximate desired transformation functions. Computers of the latter type have in general either been limited in range or exceedingly complex. Computers of the former type are inherently relatively slow in operation; in addition, they require more or less frequent attention because of the wear inherent in moving parts.

It is an object of my present invention to provide an analog computer which has no moving parts and in which linearity is achieved without the use of elaborate circuitry because the circuits employed inherently operate in accordance with the functions to be generated.

As is well known in the art, it is possible to generate common functions of two variables, such as products and quotients, if an increment of time can be selected in. accordance with the value of one of the variables so that the other variable may be integrated over this time increment. It is one object of my invention to provide a simple and reliable means for rapidly and continuously generating such time increments incorporating a novel combination of stable and reliable circuits.

It is another and more particular object of my invention to provide an analog multiplier for continuously developing the product of two variables with high linearity over any selected range of the variables.

Many devices are known in the art for continuously generating the integral of one variable with respect to time. However, the generation of the integral of one variable in respect to a second variable which is not time is a more difficult problem, which, so far as I am aware, has not been successfully solved. Accordingly, it is a second and more particular object of my invention to provide a simple device for rapidly and continuously forming the integral of one variable with respect to an other.

Other objects and further advantages of my invention will become apparent to those skilled in the art as the description proceeds.

In carrying out my invention, I provide a conventional linear saw-tooth generator for repeatedly generating a triangular wave form at a frequency which is relatively high with respect to the expected rate of variation of the variables to be transformed. The output of this generator is compared with one of the variable inputs, which is assumed to be provided in the form of a variable direct voltage, in a trigger circuit. The trigger circuit is so arranged that a large output pulse is provided when and only when the magnitude of the saw-tooth voltage exceeds the magnitude of the input. In this manner, the time of one cycle of the saw-tooth generator is divided into a first interval which is proportional to the magnitude of one of the input variables and a second interval which constitutes the remainder of the period of the saw tooth. Thus, the initial object of my invention, to provide a time increment proportional to the magnitude of the variable, is achieved.

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In carrying out multiplication, in accordance with one specific embodiment of my invention, I apply the pulse derived as described above to control a gate to which the second input variable is applied, so that the second variable is passed through the gate during the time in which the pulse is absent, which time, as described above, is proportional to the second value of the variable. The portion of the second variable that is passed through the gate is integrated, and the value of the integral stored. The gate pulse is applied to the integrator between each cycle of integration of the second variable to drive the integrator back to a reference output condition to which it is clamped by a suitable clamp circuit. The magnitude of the voltage stored is proportional to the product of the two applied variables.

In accordance with a second particular embodiment of my invention, which is adapted to generate the integral of one variable with respect to a second variable, an interval of time is measured as before except that the comparison voltage applied to the trigger circuit is now made proportional to the time rate of change of one of the variables. The interval between gate pulses is thus made proportional to the time rate of change of the first variable. The pulse times are used to gate the second variable as described above, and the gated variable is integrated and the value of the integral stored. As will later appear, the output in this case is directly proportional to the integral of the second variable with respect to the first variable.

The above and other aspects of my invention will be best understood from the following description when read in connection with the accompanying drawings. I shall first describe two embodiments of my invention in detail, and shall then point out the novel features thereof in claims.

In the drawings,

FIG. 1 is a schematic wiring diagram of one embodiment of my invention;

FIG. 2 shows a typical saw-tooth wave form;

FIG. 3 illustrates typical wave forms of a pair of input variables;

FIG. 4 is a composite Wave form diagram illustrating the manner in which a time increment is formed in the apparatus of my invention;

FIG. 5 is a composite wave form diagram illustrating the manner in which trigger and reset pulses are formed in the embodiment of FIG. 1;

FIG. 6 is a typical wave form of the output of the gate in the embodiment shown in FIG. 1;

FIG. 7 is a typical wave form illustrating the output of the integrator in the device of FIG. 1;

FIG. 8 is a schematic wiring diagram of a second embodiment of my invention;

FIG. 9 is a composite wave form diagram illustrating the manner in which a trigger pulse is formed in the embodiment of FIG. 8;

FIG. 10 is a typical wave form of a gate pulse in the device of FIG. 8; and

FIG. 11 is a typical wave form diagram illustrating the output of the integrator in the device of FIG. 8.

Referring now to FIG. 1, I have shown an embodiment of my invention which is adapted to generate the product of two variable direct voltages x and y. As shown, the apparatus essentially comprises a linear saw-tooth generator 1, a trigger 2, a gate 3, an integrator 4, and a storage output device 5. Saw-tooth generator 1 may be any one of a number of conventional and well-known circuits, such as are employed, for example, in oscilloscope circuits. Such circuits are sowell known in the art as not to require further detailed description. For example, pages 260, 261, 262 and 264 of Radar Electronic Funda mentals, published in 1944 by the Bureau of Ships, United States Navy (Navships 900,016), show typical circuits which could be employed in my invention if so desired. The only essential requirement for generator 1 is that its output be substantially linear and of constant slope and that the duration of the rising portion of the voltage be moderately constant as illustrated in FIG. 2. As will appear, the apparatus does not depend for operation on the over-all duration of cycles of the saw-tooth output, and some variation in the frequency of the generator could, therefore, be tolerated. The maximum amplitude of the sawtooth voltage should exceed the maximum amplitude of the input voltage, and may be any suitable value substantially higher than this maximum amplitude.

Trigger 2 may be any conventional high gain cornparator circuit which produces a relatively large square pulse when one of two applied inputs exceeds the other. As here shown, this circuit includes a comparison network comprising resistors 9, 10, 12 and 13 and diode Dlt,

an isolating condenser 14 and a high gain amplifier 16 having input and output resistors 15 and 17, respectively. Amplifier 16 may be of any conventional construction, but preferably is provided with an odd number of stages having a relatively high over-all gain so that a very small applied input voltage will produce a large, square, negative pulse at the output. In operation, a first voltage is applied across resistors 9 and 10 of the comparator and a second voltage is applied across resistors 12 and 13. Condenser 14 and resistor 15 are so selected that relative ly low frequency changes in the voltage applied across resistors 12 and 13 will not cause any appreciable input to amplifier 16. Preferably, resistors 10 and 13 are chosen to be greatly larger than resistors 9 and 12. For example, resistors 9 and 12 might be 1 megohm and resistors 10 and 13 might be 10 megohms. When the voltage applied across resistors 9 and 10 is less than the voltage applied across resistors 12 and 13, the presence of diode D1 blocks any conduction through the path including resistor 9 and resistor 13 in series. However, as soon as the voltage applied across resistors 9 and 10 exceeds the voltage applied across resistors 12 and 13, the voltage across resistor 10 will exceed the voltage across resistor 13 and the current through the resistor 9 will be divided through resistors 10 and 13. The voltage across resistor 13 will thus increase and a signal will be applied to am plifier 16 which will continue to be applied as long as the voltage across resistors 9 and 10 continues to increase.

produces the large negative output pulse previously described, tube V1 is driven abruptly to cutofl and cathode 27 falls to substantially the potential of the negative terminal of batery 25. Diode D2 now conducts, shunting the signal y through the relatively small cathode resistance, and a negative voltage close to the potential of battery will appear across resistor 52 and at output terminal c. For example, if cathode resistor 28 was 10K oluns, resistor 51 was 1 megohm, and resistor 52 was 10 megchnrs, and assuming battery 25 to be 50 volts and the maximum value of y to be 100 volts, a voltage equal to (10/ 11) y would appear at output terminal 0 when no trigger pulse was present, the output voltage would go to 48.5 volts during the trigger pulse, and the maximum current through tube V1 would be 16 milliamperes. Integrator 4 may be any conventional integnatorcapa'ble of modification to reset rapidly to ground for a negative input. comprising :triodes V2 and V3, the first stage V2 acting as a plate follower and the second stage V3 actingas a cathode follower.

Triode V2 has its plate connected to the positive terminal of a suitable source of potential indicated by 13+, the

During this interval of conduction, a negative output pulse will appear at terminal 0 of trigger 2.

Gate 3 may be any conventional gate circuit of the type through which a first voltage is linearly transmitted until a second voltage is applied which cuts oil the gate, as by effectively shunting the first voltage. However, in the preferred form of my invention this unit also functions to provide a reset pulse, and is thus designed to have a constant negative output voltage when not passing a positive signal. For example, as shown, a conventional vacuum tube V1 may be employed for this purpose. As shown, tube V1 has a cathode 27, a grid 23 and a plate 26. Operating voltage for the tube is supplied by any suitable means, as indicated by the B+ symbol representing a source having its positive terminal connected to plate 26 through resistor 29 and its negative terminal connected to ground. For reasons to appear, the cathode is returned to ground through a cathode resistor 28 and a source of negative potential shown as a battery 25, which has its positive terminal grounded as shown. Grid 23 is returned to the negative terminal of battery 25 through resistor 32.

As shown, the variable input signal voltage y is applied between input terminal b and ground. Input terminal I) is also connected to ground through resistors 51 and 52 in series. The junction of resistors 51 and 52 is directly connected to output terminal 0, and is connected to cathode 27 through a diode D2.

The components are so selected that with amplifier 16 after several cycles of the pulses from integnator 4, the.

negative terminal of which may be assumed to be grounded, thnough a suitable plate resistor 53. The cathode of tube V2 is grounded, as shown, through a suitable cathode resistor 54, and the grid is returned to the cathode through a suitable grid resistor 55.

The output of tube V2 is resistance coupled to the of tube V3 through a potential divider comprising resistors 56 and 57 in series, as shown. Tube V3 acts a conventional cathode follower, having its plate directly connected to 3+ and its cathode connected to a suitable negative source B- through cathode resistor 58. The constants are selected so that with no input to the grid of tube V3, output terminal b is at ground potential. Integration of positive input signals is accomplished in a convention al manner, by means of a capacitor 59 connected between the cathode of tube V3 and the grid of tube V2. The input signal is applied through resistor 60 to the grid of tube V2. Capacitor 59 gnadually charges as the voltage builds up at the cathode of tube V3, but due to the degenerative feedback supplied to the input through capacitor 59, the time constant of the integrator is greatly increased.

The integrating action just described is conventional connected across it as shown. With these modifications, the negative input pulse, applied from gate 3- When trigger 2 supplies its output pulse, rapidly drives the integrator output to ground potential.

Storage output device 5 may be any one of a number of suitable conventional devices, but is here shown simply as an R-C circuit for producing an output voltage proportional to the peak value of the pulses from integmtor 4. Since it may be desirable to provide a positive output signal, a stage 61, which may "be a conventional phase inverter, is shown in output device 5. The function of this unit is simply to invert the phase of pulses from integrator 4, and it may be entirely conventional in structure.

The output of amplifier 61 is connected to ground through a simple averaging circuit 37 and capacitor 38 in parallel. The values of R and C are selected such that,

potential at output terminal 0 is proportional to the peak value of the pulses from integrator 4. Should this peak Here, it is shown as a two-stage amplifier value change, the output voltage will accordingly follow the change with a lag of a few cycles. Normally, the basic frequency of the pulses will be set by sawtooth generator 1, the frequency of which is chosen to be greatly in excess of the frequency at which the variables will be expected to change. Normally, for the usual physical variables, if the frequency of the saw-tooth generator is in the order of kilocycles or tens of kilocycles this condition will easily be satisfied.

In considering the operation of the embodiment or" FIG. 1, reference will be made to FIGS. 2 through 7, show typical wave forms at various stages in the equip ment.

The output of saw-tooth generator 1 is generally of the form shown in FIG. 2. As indicated, the rise portion of this wave form may be represented by the linear relationship v=kt, where v is the voltage, t is the time, and k is a proportionality constant dependent on the slope. As shown in FIG. 3, the variable voltages x and y are direct voltages which are assumed to vary very slowly with respect to the frequency of saw-tooth generator 1, as illustrated by a comparison of FIGS. 2 and 3. (The relative variations have been considerably enaggerated in the drawings for purposes of illustration.)

As will appemfrom the above description of trigger 2, with the voltage x applied to terminals 18 and 19 and the output of saw-tooth generator 1 applied to input terminal a of trigger 2, no output will occur during the time At shown in FIG. 4 in which the saw-tooth output is less than the voltage x. When the saw-tooth voltage exceeds x, and for the remainder of the rise time of the saw-tooth wave, the trigger will produce a negative output pulse as shown in FIG. 5. This output pulse will be applied to gate 3 together with the variable voltage y. As shown in FIG. 6, the output of the gate will be a series of positive pulses having a height y and a width kx. This may be seen from the fact that, as noted above, the sawtooth voltage has the value v=kt, and at the cutofi kt is equal to x, which thus defines the width of the positive pulses. As shown, the gate produces negative pulses during the remainder of the rise time of the saw tooth. During the positive pulse periods, the output of the integrator 4 is as shown in FIG. 7. The peak value e of these pulses is equal to i 1 I 1 ig gaitl; ydst- )xy As noted above, storage output device will charge over a few cycles to this peak value, and the output of terminal c of storage output device 5 is thus proportional to xy.

Referring now to FIG. 8, a second embodiment of my invention is shown which is adapted to provide the integral of one variable with respect to another. In this embodiment, I provide a linear sawtooth generator 44 which may correspond identically to saw-tooth generator 1 in FIG. 1, a trigger 45 which could correspond identically to trigger 2 in FIG. 1, a gate 46 which may correspond identically to gate 3 in FIG. 1 with one exception to be noted below, an integrator 47 which may correspond identically to integrator 4 in FIG. 1, and a storage output device 48 which may correspond identically to storage output device 5 in FIG. 1.

In this embodiment, I provide means 39 for difierentiating the variable x before it is applied to the trigger circuit. Thus, the voltage applied to input terminal d of trigger 45 will be proportional to dx/dt, and the time during which the trigger output is not present, At, will thus be proportional to (l/k)dx/dz. The difierentiator itself is shown as a simple R-C combination comprising a capacitor 40 and a resistor 41, which operates in a manner well known in the art to produce a voltage across resistor 41 proportional to the rtirne rate of change of the applied signal voltage x.

Gate 46 may be identical to gate 3 in FIG. 1, except that battery '25 is omitted and the grid and cathode of the stage corresponding to V1 would be returned to ground through the resistors corresponding to grid resistor 32 and cathode resistor 28. Thus, when the trigger pulse is applied to gate 46, the cathode, and output terminal 0, will be referenced to ground instead of to a negative potential. Thus, pulses of the kind shown in FIG. 10 will be produced at the output of gate 46, with no intervening negative pulses because the gate is re stored to ground during the trigger pulse period.

The integrator operating on the pulses from gate 46 will have an output proportional to the integral of y over a time proportional to the rate of change of x. Mathematically, this relationship may be stated as follows:

1 dx AL-( 1 e un This equation represents the output of the integrator for one cycle. Since the integrator is not reset by the process, the efiect is to integrate these integrations over time.

Thus, the output of the integrator is essentially a double integralequal to By known methods, since y is essentially constant over each of the one-cycle integrations, this expression can be reduced to the ant that many modifications and changes can be made without departing from the scope of my invention. Accordingly, I do not wish to be limited to the details shown, but only by the scope of the following claims.

Having thus described my invention, what I claim is:

1. A timing circuit, comprising, la saw-tooth wave generator for producing an output voltage having a relatively short fall time and a linearly rising wave form, a comparator network comprising first and second resistors and a rectifier in series, means connecting the output of said generator across one of said resistors with the rectifier blocking conduction through the second resistor, a gain amplifier, a circuit including a capacitor coupling the junction of said second resistor and said rectifier to the input of said amplifier, and means for applying a variable voltage across said second resistor, whereby an input volt age is applied from said generator to said arnplifier through said rectifier only when the output of said generator exceeds the magnitude of said variable voltage to cause said amplifier to produce a first output voltage during Ia. time proportional to flre magnitude of said variable voltage and a second output voltage during the remaining portion of said generator cycle.

2. In an analog multiplier for continuously generating a desired function of a first and a second variable wherein a timing means repeatedly equates a time increment to the magnitude of the first variable, and integrating means controlled 'by said timing means -for integrating the second variable over the time increments so formed, the combination with said timing means including a triangular pulse source of uniform slope occurring at a predetermined frequency, a comparator means comprising first and second resistors and a unilateral conducting device in series, means connecting said triangular pulse source across one of said resistors with the unilateral conducting device blocking conduction through the second resistor, a high gain amplifier, a circuit including a capacitor coupling the junction of said second resistor and said unilateral conducting device to the input of said amplifier, means for supplying a voltage representing said first variable fiuctuating at an average frequency substantially less than said predetermined frequency across said second resistor, whereby an input voltage is applied from said triangular pulse source to said amplifier through said uni lateral conducting device only when the triangular pulse source exceeds the magnitude of said voltage representing said first variable to cause said amplifier to produce a first output during a time proportional to the magnitude of said voltage and a second output during the remaining portion of said triangular pulse.

3. In an analog multiplier of the class wherein a first means supplies a signal proportional to a first variable for a time proportional to a second variable, and second means for integrating said supplied signal, the combination with said first means including a trigger circuit comprising a comparator network having a first and a second resistor and a diode connected in series, an isolating condenser, a high gain amplifier, means for connecting said isolating condenser from the junction of said second resistor and said diode to the input of said amplifier, a source of triangular wave pulses having a relative short fall time and a linearly rising Wave form, means connecting said source of triangular wave pulses across said first resistor, and means for applying a variable voltage representative of said first variable across said second resistor, whereby an input is applied irom said source of triangular wave pulses to said amplifier through said diode when and only when the magnitude of said triangular pulses exceeds the magnitude of said variable Voltage so that said amplifier produces a first output during an initial portion of said triangular wave proportional to said first variable and a second output during the remaining portion of said triangular wave.

4. In an analog multiplier for continuously generating a product of two variables, characterized by a trigger circuit for deriving a time increment proportional to one of said two variables, said trigger circuit including a comparator circuit having a pair of voltage divider networks,

' each of said voltage divider networks comprising serially age divider networks, and means for connecting a variable voltage representative of one of said two variables across the other of said pair of voltage divider networks, whereby during the initial portion of said saw-tooth pulses said diode means is nonconductive and only becomes conductive during that portion when the magnitude of said sawtooth pulses exceeds the magnitude of said variable voltage so that a signal is permitted to flow from said sawtooth generator through said diode to said amplifier input thereby dividing the output of said amplifier into afirst increment proportional to the magnitude of said one variable and a second increment for the remainder of the pulse.

References Cited in the file of this patent V UNITED STATES PATENTS 2,969,915 Collier et a1 Jan. 31, 1961 

4. IN AN ANALOG MULTIPLIER FOR CONTINUOUSLY GENERATING A PRODUCT OF TWO VARIABLES, CHARACTERIZED BY A TRIGGER CIRCUIT FOR DERIVING A TIME INCREMENT PROPORTIONAL TO ONE OF SAID TWO VARIABLES, SAID TRIGGER CIRCUIT INCLUDING A COMPARATOR CIRCUIT HAVING A PAIR OF VOLTAGE DIVIDER NETWORKS, EACH OF SAID VOLTAGE DIVIDER NETWORKS COMPRISING SERIALLY CONNECTED FIRST AND SECOND RESISTORS, A DIODE MEANS INTERCONNECTING THE JUNCTIONS OF SAID FIRST AND SECOND RESISTORS OF EACH OF SAID DIVIDER NETWORKS, A COUPLING CAPACITOR, A HIGH GAIN AMPLIFIER, MEANS FOR CONNECTING SAID COUPLING CAPACITOR FROM THE JUNCTION OF SAID FIRST AND SECOND RESISTORS OF ONE OF SAID DIVIDER NETWORKS TO THE INPUT OF SAID AMPLIFIER, A SAW-TOOTH PULSE GENERATOR HAVING AN OUTPUT OF UNIFORM SLOPE, MEANS FOR CONNECTING THE OUTPUT OF SAID SAW-TOOTH GENERATOR ACROSS ONE OF SAID PAIR OF VOLTAGE DIVIDER NETWORKS, AND MEANS FOR CONNECTING A VARIABLE VOLTAGE REPRESENTATIVE OF ONE OF SAID TWO VARIABLES ACROSS THE OTHER OF SAID PAIR OF VOLTAGE DIVIDER NETWORKS, WHERE- 